The PCIe PHY IP consists of hardmacro PMA and softmacro PMD compliant to PCIe Base 6.0 specification. This IP offers a cost-effective and low-power solution using 5nm FinFet CMOS technology. It ...

This full release enables 5nm systems-on-chip (SoC) designs in next-generation advanced mobile and high-performance computing (HPC) applications, targeting high-growth 5G and artificial intelligence ...