The CSI-2 Tx and Rx IP Cores are Production Proven and have been integrated with matching PHY’s in different process nodes in major Fabs. The MIPI Camera Serial Interface (CSI-2) is an interface ...

The CSI2 Receiver IP is fully compliant with the MIPI Alliance Specification for Camera Serial Interface 2 (CSI-2) Version 1.1 and D-PHY Version 1.1. The CSI2 Receiver IP supports flexible pixel ...

[Adam] elected to use the Mobile Industry Processor Interface (MIPI) Camera Serial Interface Issue 2 (CSI-2). This high-speed serial interface is optimized for data flowing in one direction.

If you want to use a display or camera with an FPGA, you will often end up with a MIPI-based solution. As of the Xilinx Vivado 2020.1 release, the MIPI DSI (display serial interface) and CSI ...

Luckfox has recently released the Core1106 Core Board Rockchip RV1106 system-on-module with a compact 30x30mm size, 112 ...