Going the schematic capture route eliminates the need to learn VHDL or Verilog. [Carl’s] tutorial starts with installing Altera’s Quartus II software. He then takes the student through the ...

Over on GitHub, [ttsiodras] wanted to learn VHDL. So he started with an algorithm to do Mandelbrot sets and moved it to an FPGA. Because of the speed, he was able to accomplish real-time zooming.