来自MSN3 个月
台积电N2P和N2X制程技术IP就绪，2nm芯片设计时代来临
台积电近期在欧洲开放创新平台论坛上宣布了一项重要进展，其第二代2纳米级制程技术N2P和N2X已准备好迎接电子设计自动化（EDA）工具和第三方IP ...
来自MSN3 个月
台积电称N2P和N2X IP已准备就绪，客户已可设计性能增强的2nm芯片
目前，Cadence 和 Synopsys 的所有主要工具以及 Siemens EDA 和 Ansys 的仿真和电迁移工具，都已为台积电的 N2P 制造工艺做好准备。这些程序已经通过 N2P ...
Design-Reuse1 年
224G Ethernet PHY in TSMC (N3E, N2P)
The Synopsys 224G Ethernet PHY IP, an integral part of Synopsys’ high-speed SerDes IP portfolio, meets the growing high bandwidth and low latency needs of high-performance data center applications.
Business Wire1 个月
Silicon Creations Expands TSMC N2P Clocking IP Portfolio including Novel Temperature Sensor ...
ATLANTA--(BUSINESS WIRE)--Silicon Creations, a leading provider of high-performance analog and mixed-signal intellectual property (IP), today announced the successful tape-out of a TSMC N2P chip ...
Design-Reuse1 个月
PCIe 7.0 PHY in TSMC (N5, N3P, N2P)
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 7.0 meets today’s demands for higher bandwidth and power efficiency across backplane, and chip-to-chip channels. The PHY’s unique DSP ...