Crossover MCUs with real-time functionality and MCU usability for next-generation consumer and industrial IoT applications. Higher performance applications cores, an independent MCU-like real-time domain, EdgeLock® secure enclave and ML acceleration for the edge.

The IMX-64 inverse multiplexer provides bandwidth-on-demand for applications such as image transmission, LAN internetworking and videoconferencing. In addition, it enables automatic backup of high speed leased lines via switched digital services.

The i.MX 8 series was announced in September 2013 and is based on the ARMv8-A 64-bit CPU architecture. According to NXP, the i.MX 8 series is designed for Driver Information Systems (car computers) and applications have been released.

IMX-64 offers a large choice of interfaces on the network side, as well as for the data ports. It connects to basic rate ISDN (BRI) switched digital service. It also supports dedicated circuits (leased lines) with a wide range of interfaces (see Ordering).

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The i.MX 6 series of applications processors, part of the EdgeVerse™ edge computing platform, offers a feature- and performance-scalable multicore platform that includes single-, dual- and quad-core families based on the Cortex architecture—including Cortex-A9, combined Cortex-A9 + Cortex-M4 and Cortex-A7 based solutions.

This device encompasses a quad-core Arm ® Cortex ®-A9 platform running up to 1.2 GHz* with 1 MB of L2 cache, advanced graphics, prefetch and resolve engine, and optimized 64-bit DDR3 or 2-ch., 32-bit LPDDR2 support.

imx-image-full: This is the big image which includes imx-image-multimedia + OpenCV + QT6 + Machine Learning packages.

i.MX6 series processors from NXP offer a high performance, scalable multicore platform for smart devices based on ARM Cortex -A9 architectures.

Support of 64-bit Arm® v8-A architecture 512 KB unified L2 cache Cortex®-M7 core platform • Microcontroller available for customer application • Real-time processing • Cortex®-A53 complex off loading • Low power operation Cortex®-M7 CPU operating up to 800 MHz • 32 KB L1 Instruction Cache • 32 KB L1 Data Cache