To solve this issue, we propose three techniques to achieve a 16Kb energy-efficient CSDB-eDRAM for cryogenic memory implementation. First, we propose a 4T CSDB-GC that is able …

Gain-cell embedded DRAM (GC-eDRAM) is a dense, low power option for embedded memory implementation, supporting low supply voltages. However, due to its structur

In this brief, a novel charge-domain 4T2C eDRAM-CIM macro is proposed that has three key features: 1) a novel 4T2C eDRAM cell with an enhanced PVT variation tol

2023年6月2日 · GC eDRAM是一种6T SRAM和1T1C eDRAM折中选择的产物，它结合了SRAM (与数字CMOS技术兼容)和1T1C eDRAM (高存储密度)的优点，同时规避了SRAM (单元面积 …

CSDB-eDRAM for cryogenic memory implementation. First, we propose a 4T CSDB-GC that is able to significantly improve the retentio time. Second, we propose a wordline voltage off-chip …

2017年7月7日 · This chapter discusses the basic operation of GC-eDRAM, as well as its many advantages and few drawbacks compared to SRAM and 1T-1C eDRAM. The chapter then …

2014年6月1日 · In this paper, we present a novel 4T GC-eDRAM bitcell that utilizes an internal feedback mechanism to significantly increase the data retention time in scaled CMOS …

2020年8月10日 · Gain cell embedded DRAMs (GC-eDRAM) are a potential alternative for conventional static random access memories thanks to their attractive advantages such as …

Gain-Cell embedded DRAM (GC-eDRAM) has recently been recognized as a possible alternative to traditional SRAM. While GC-eDRAM inherently provides high-density,

2021年11月1日 · The 4T GC-eDRAM bitcell that utilizes an internal feedback mechanism to significantly increase the data retention time to 8.29 ms at 27 °C and 3.98 ms at 85 °C at 700 …