LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production.
74138 Datasheet (PDF) - Fairchild Semiconductor
These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance …
74LS138译码器详解-CSDN博客
2018年11月24日 · 1、74LS138 为3 线－8 线译码器，共有 54/74S138和 54/74LS138 两种线路结构型式，其74LS138工作原理如下：当一个选通端（G1）为高电平，另两个选通端（/ (G2A) …
SN74LS138 data sheet, product information and support | TI.com
TI’s SN74LS138 is a 3-line to 8-line decoder / demultiplexer. Find parameters, ordering and quality information.
74138,74139,7447,74147,74151,74153_74ls138引脚图及功能-CSD…
2024年8月25日 · 74HCxxx是74LSxxx同序号的翻版，型号最后几位数字相同，表示电路的逻辑功能、管脚排列完全兼容。 附加控制端（又称“片选”输入端）S1、S2'、S3'为100时（即内部逻辑图中的 Gs 输出为高电平时），译码器处于工作状态，可将地址端A2,A1,A0的二进制编码在Y0'～Y7'对应的输出端以低电平输出。 否则，译码器被禁止，所有的输出端被封锁在高电平。 例：A2A1A0为110时，Y6'为低电平，共阳极LED6被点亮，仿真如下： 若将S1作为“数据”输入 …
74LS138:工作原理,引腳功能,內部邏輯圖,真值表,_中文百科全書
74LS138 為3 線－8線 解碼器，共有 54LS138和 74LS138 兩種線路結構型式。 54LS138為軍用，74LS138為民用。 ①當一個選通端（E1）為高電平，另兩個選通端（ (/E2))和 (/E3)）為低電平時，可將地址端（A0、A1、A2）的 二進制編碼 在Y0至Y7對應的輸出端以低電平譯出。 (即輸出為Y0至Y7的非)比如：A2A1A0=110時，則Y6輸出端輸出低 電平信號。 ②利用 E1、E2和E3可級聯擴展成 24 線 解碼器；若外接一個 反相器 還可級聯擴展成 32 線解碼器。 ③若將選通端中的 …
SN74LS138 数据表、产品信息和支持 | 德州仪器 TI.com.cn
TI 的 SN74LS138 是一款 3 线至 8 线解码器/多路信号分离器。 查找参数、订购和质量信息.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production.
74LS138 Decoder Pinout, Features, Circuit & Datasheet
2018年10月26日 · 74LS138 is a member from ‘74xx’family of TTL logic gates. The chip is designed for decoding or de-multiplexing applications and comes with 3 inputs to 8 output setup. The design is also made for the chip to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times.
74LS138 IC: Pin Diagram, Circuit and Applications - ElProCus
What is a 74LS138 IC? The IC 74LS138 is a 3 to 8 line decoder integrated circuit from the 74xx family of transistor-transistor-logic-gates. The main function of this IC is to decode otherwise demultiplex the applications. The setup of this IC is accessible with 3-inputs to 8-output setup.