A four-channel time-interleaved pipelined ADC employs a new timing calibration technique to suppress mismatch-induced spurs and achieve a Nyquist-rate SNDR of 44.4 dB. Designed in 65-nm CMOS technology, the ADC draws 120 mW, providing an FOM of 219 fJ per conversion step.

2007年3月26日 · Abstract: A 1-V, 8-bit pipelined ADC is realized using multi-phase switched-opamp (SO) technique. A novel loading-free architecture is proposed to reduce the capacitive loading and to improve the speed in low-voltage SO circuits.

An 8-bit 150-MHz CMOS A/D converter Abstract: This paper describes an 8-bit 5-stage pipelined and interleaved analog-to-digital converter that performs analog processing only by means of open-loop circuits such as differential pairs and source followers to achieve a …

2022年3月20日 · PCF8591是一个单片集成、单独供电、低功耗、 8-bit CMOS数据获取器件 。 PCF8591具有 4个模拟输入、1个模拟输出和1个串行I²C 总线接口 。 PCF8591的3个地址 引脚 A0, A1和A2可用于硬件地址编程 ，允许在同个I2C总线上接入8个PCF8591器件，而无需额外的硬件。

This paper describes design and implementation of a 10-bit current steering CMOS D/A converter for a direct digital synthesizer that achieves >60 dBc SFDR at 250 MS/s sampling rate with power dissipation of 17 [email protected] V. An 8-bit current scaling D/A convertor has been implemented in a standard 3 mu m p-well CMOS process.

2022年2月23日 · A real-time output 56 GS/s 8 bit SAR ADC integrated with 16-lane transmitters in a 28 nm CMOS is presented in the present study. The ADCs utilize an asynchronous technique, monotonous switching, split capacitors, and a 1 bit redundancy to achieve both a high-speed operation and low-power consumption.

Fabricated in a 0.6-mm CMOS technology, the converter achieves differential and integral nonlinearities of 0.62 and 1.24 LSB, respectively, and a signal-to-(noise + distortion) ratio of 43.7 dB at a sampling rate of 150 MHz. The circuit draws 395 mW from a 3.3-V supply and occupies an area of 1.2 × 1.5 mm2.

The PIC16F628, a versatile 8-bit microcontroller, showcases CMOS technology with its 18-pin layout and built-in flash memory. With a sophisticated RISC architecture, it significantly enhances processing performance, boosting execution speed and enabling efficient resource use, crucial in embedded systems where resources are limited.

The MC74HC589A device consists of an 8−bit storage latch which feeds parallel data to an 8−bit shift register. Data can also be loaded serially (see the Function Table). The shift register output, QH, is a 3−state output, allowing this device to be used in bus−oriented systems.

2013年10月9日 · The DAC8408 is a monolithic quad 8-bit multiplying digital-to-analog CMOS converter. Each DAC has its own reference input, feedback resistor, and onboard data latches that feature read/write capabilit