LDD是一项通过在TFT的源极和漏极之间添加轻掺杂区域的技术，它的串联电阻增加，从而大大减小了漏极的电场，从而导致热载流子效应和短沟道效应大大降低。 但是，如果未进行优化，则引入LDD结构可能会对LTPS TFT的特性产生一些不利影响。 在本文中，我们研究了不同的LDD结构对TFT性能的影响，从而找到了最佳的LDD结构。 低温多晶硅薄膜晶体管（LTPS TFT）由于其更高的载流子迁移率和更好的导电性而在平板显示器和其他领域具有广阔的应用前景。 出于针对 …

We fabricate a new polycrystalline silicon thin-film transistor (poly-Si TFT), called a gate-overlapped lightly doped drain (GO-LDD) TFT, which reduces the leakage current without sacrificing the ON current.

2019年10月4日 · To alleviate and eventually to eliminate these two effects, we introduce and implement the Lightly Doped Drain (LDD) structure in the LTPS TFT device. LDD is a technology by adding lightly doped region between source and drain in a TFT, its series resistance is increased, thereby greatly reducing the electric field of drain, resulting in much ...

To alleviate and eventually to eliminate these two effects, we introduce and implement the Lightly Doped Drain (LDD) structure in the LTPS TFT device. LDD is a technology by adding lightly doped region between source and drain in a TFT, its series resistance is increased, thereby greatly reducing the electric field of drain, resulting in much ...

tft结构分类 （1） Self Align 类型：优点是寄生电容小，开关响应速度快，适用于PMOS TFT （2） LDD 类型：优点是Ioff小，Kink Effect轻微，Hot Carrier效应小，缺点是Ion较小

We have fabricated a gate-overlapped lightly doped drain (GO-LDD) polycrystalline silicon thin-film transistor (poly-Si TFT) applicable for large area AMLCD by employing the uniform and low-temperature doping techniques, such as ion shower doping and in situ doping.

提出了多晶硅薄膜晶体管的一种Halo LDD新结构,这种结构是在基于LDD结构的基础上,在沟道靠近源,漏端引入高掺杂的Halo区.并利用工艺和器件模拟软件对该Halo LDD P-Si TFT的电学特性进行了分析,并将其与常规结构,LDD结构和Halo结构进行了比较.发现Halo LDD结构的P-Si TFT能 ...

发现Halo LDD结构的P-Si TFT能有效地降低泄漏电流、抑制阈值电压漂移和Kink效应;减少因尺寸减小后所带来的一系列问题。 关键词 : 多晶硅薄膜晶体管 Halo LDD 模拟

研究了轻掺杂漏极 (LDD) 掺杂浓度对低温多晶硅 (LTPS) 薄膜晶体管 (TFT) 电容的影响。 观察到异常的栅源电容现象：首先，电容减小，然后在饱和区根据栅极电压增加。 这种现象不受子带隙态密度的影响，随着 LDD 区域的掺杂浓度降低而出现。 为了研究每个源极和漏极 LDD 剂量对栅源电容的影响，进行了二维器件模拟，其中源极和漏极 LDD 的每个剂量都单独改变。

2008年8月22日 · In this letter, the resistance of the lightly doped drain (LDD) region in n-channel polycrystalline-silicon thin-film transistors (poly-Si TFTs) was analyzed. It was found that the LDD resistance was composed of an LDD-length-dependent part and a gate-bias-dominant part.