2024年1月18日 · An 89TOPS/W and 16.3TOPS/mm2 All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications. 首先是这篇2021的文章，我称之为ISSCC上的数字SRAM CIM的开山之作。

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2023年6月4日 · 存内计算 技术已经受到了广泛的关注。 在不同类型的存储器中，SRAM 速度快，精度高，并且和 数字逻辑工艺 完全兼容。 这里收集了近几年关于 SRAM 的存内计算工作，主要关注 数字计算 的 架构设计，会有少量 模拟计算 、 编译器 和 软硬件协同 的工作。 期望各位大佬来补充，更新会放在 Github 上。 7.1 A 22nm 832Kb Hybrid-Domain Floating-Point SRAM In-Memory-Compute Macro with 16.2-70.2TFLOPS/W for High-Accuracy AI-Edge Devices.

Compute-in-memory has attracted growing attention in the AI era. Among different types of memory, SRAM features high speed, precision, and compatibility with digital CMOS technology. Here is a collection of recent work on SRAM-based compute-in-memory. Most of these work focuses on AI acceleration.

存算一体（Compute-In-Memory，CIM）架构可直接在存储器内完成计算，消除了计算和存储间的频繁访问，被认为是一种能够突破冯诺依曼瓶颈的高能效AI计算架构。

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Abstract: Digital computing-in-memory (DCIM) has showcased its superiority in terms of throughput and accuracy as it scales down toward advanced technology nodes [1] –[3]. However, the inherent computation scheme imposes a limitation on both density and efficiency on the order of conventional digital logic.

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Fabricated in a 28-nm CMOS process, the proposed accelerator exhibits an 8.17-TOPS/W peak energy efficiency and a 0.63-TOPS/mm 2 peak area efficiency at 800 MHz and 0.9 V while requiring only a 120 kB on-chip static random-access memory (SRAM) for the ResNet-50.