TSMC continues to expand its 5nm technology family to meet diverse customer demands. These include N5P, N4, and N4P for better power, performance and density, N4X, a process tailored for high performance computing (HPC) applications, and N5A for automotive applications.

In mid 2020 TSMC claimed its (N5) "5 nm" process offered 1.8x the density of its "7 nm" N7 process, with 15% speed improvement or 30% lower power consumption; an improved sub-version (N5P or N4) was claimed to improve on N5 with +5% speed or -10% power.

4lpe的晶体管和大部分基本思路都与5lpe一致，不过金属互联间距有进一步的缩减；而台积电的n5p与n5有着相同的设计规则，完全的ip兼容性，同功耗下7%性能提升，同性能够下15%功耗降低。

Full-fledged extreme ultra-violet (EUV) N5 adoption makes mask layers and process complexity more manageable. The N5P technology is the performance-enhanced version of N5 and it delivers additional power and performance improvement with backward compatible design rules for easy IP porting.

2022年4月1日 · 據業界消息，台積電fab 21廠初期將生產n5家族中的n5p及n4製程。台積電的n5p製程已在去年開始量產，效能較n5製程再提升5％，同一運算效能下功耗可再下降10％。台積電n4製程是由n5製程進行優化及升級，可進一步提升效能、功耗、及密度。

2022年4月1日 · 据业界消息，台积电Fab 21厂初期将生产N5家族中的N5P及N4制程。 台积电的N5P制程已在去年开始量产，效能较N5制程再提升5％，同一运算效能下功耗可 ...

NXP will adopt N5P, an enhanced version of TSMC’s 5nm technology, which provides about 20 percent faster speed or about 40 percent power reduction compared to the preceding 7nm generation, and is supported by the industry’s most comprehensive design ecosystem.

2019年4月25日 · TSMC showed an N5 wafer with SRAM yields above 90% and logic yields above 80% from the first phase of its new Fab 18. Shells for two more phases are under construction. A few key IP blocks for N5 such as PAM4 serdes and HBM blocks are …

2024年10月8日 · 台积电位于亚利桑那州菲尼克斯附近的Fab 21工厂试产的5nm节点，包括N4/N4P/N4X和N5/N5P/N5X工艺。 目前，苹果的A16 Bionic芯片正在使用N4P工艺进行生产，这也是该工厂的一个重要测试，苹果芯片的生产数量虽小，却意义重大。

2022年11月8日 · 據了解，台積電美國廠（Fab21）初期將生產N5（5奈米）家族中的N5P、N4，其中2021年開始量產的N5P 製程晶片效能比N5技術再提升5%、功耗下降一成；而N4則是N5的第二個升級版，台積電N5已量產兩年多，因此台積電在美國廠導入升級版的N5家族成員，更可滿足客戶需求、具備「即戰力」。 供應鏈消息則傳出，台積電Fab 21原本目標第一期月產能將達2萬片，將進一步上調到2.2萬片。 業界分析，台積電對美國廠有很高的期望，要求員工全力 …