This application note describes how to develop an HD camera application with the NXP i.MX RT1050 processor. For this demo application, the RT1050 receives video frames from a camera device with resolution of HD-720 (1280x720 pixels, also called 720P), displays on an LCD panel, and optionally saves to a microSD card with compressed JPEG format.

2018年6月16日 · PXP 是 NXP 设计的一种高性能的 2D 图形处理微构架。 用于图像数据发送到 LCD 或者 TV编码器之前的数据处理，例如图像缩放、旋转等。 为无 SDRAM 和基于 SRAM 的系统提 ...

2021年12月25日 · PXP (Pixel Processing Pipeline) 是 NXP 设计的一种高性能的 2D 图形处理微构架，用于在 LCD 显示之前对图像数据进行数据处理，处理操作例如图像缩放、旋转、色彩空间转换等，为无 SDRAM 和基于 SRAM 的系统，提供占用内存最小的图像数据优化和性能，PXP 将几 …

2021年3月16日 · I need at the worst case to rotate the full 1280x720 LVGL buffer to a 720x1280 frame buffer for the display. Using PXP I can do this in 15.7ms, not great but we can live with that.

2019年5月15日 · The RECOVER_ON_UNDERFLOW bit enabled in LCDIF_CTRL1 register will load LCD frame buffer data again when underflow issue happened. That will recover LCD display if Hyperram bandwidth is arbitrated by LCD and ARM core.

PXP assumes that the underlying transport is able to encapsulate complete PXP frames. Although the frame start and termination can be determined based on the length indicators in the encoding, both WebSockets and QUIC provide a convenient binary envelope for PXP frames.

Transport","","PXP uses a lower level transport protocol to carry PXP frames. A transport","protocol MUST provide the following:","","- Unicast Reliable Delivery.","- Connection-Oriented","- Some form of error checking is assumed to be in use either at the transport"," protocol or at each lower layer hop.

2022年3月16日 · 这次评估RT1052 PXP的图像混合功能，记录了本次的开发日记。 1. 首先阅读芯片手册. 说一下本人粗看该章节之后的感想，很少会极其详细查看芯片的手册，只要在遇到难以解决的问题时，才会详细看芯片手册，但是有一点就是模块的内部架构及相关参数还是要大体了解的，其实和编程接口是相关的，如果不了解这些信息的话，虽然会使用API进行编程，但是实际一旦遇到问题是缺少理论支撑，排查问题就会难一些。 2. 设备宏开关. 在前面支持LCD的章节当 …

2024年9月16日 · Hi, I’m using LVGL on a system with an NXP i.MX RT1170 CM7 and a 480x800 display (natively in portrait mode). In our application we’d like to rotate frames and we currently do so by rendering the full buffers (LV_DISPLA…

It is used to minimize the memory footprint required for the display pipeline and provide an area and performance optimized to both SDRAM-less and SRAM-based systems. The PXP integrates several independent processing stages into a cohesive strategy to create flexible pixel pipeline. Figure 1 shows the PXP block diagram. Figure 1. Block diagram