SerDes is a functional block that Serializes and Deserializes digital data used in high-speed chip to chip communication. Modern SoCs for high-performance computing (HPC), AI, automotive, mobile, and Internet-of-Things (IoT) applications implement SerDes that can support multiple data rates and standards like PCI Express (PCIe), MIPI, Ethernet ...

A Serializer/Deserializer (SerDes) is a pair of functional blocks commonly used in high speed communications to compensate for limited input/output. These blocks convert data between serial data and parallel interfaces in each direction.

SerDes为英文Serializer (串行器)/DeSerializer (解串器)的简称。 它是一种主流的 时分多路复用 (TDM)、 点对点 (P2P)的串行通信技术。 即在发送端多路低速并行信号被转换成高速串行信号，经过传输媒体 (光缆或铜线)，最后在接收端高速串行信号重新转换成低速并行信号。 芯片间数据传输时，要保证数据准确被接收端接收，需要考虑时钟信号在准确的时刻采集数据信号，因为需要考虑时钟信号与数据信号的同步。 根据时钟信号与数据信号的同步方式分为 系统同步， 源同步， …

2022年8月28日 · SerDes是典型的数模混合系统，需要数字电路和模拟电路、信号与系统、通信原理、微波和射频电路、电磁场、信号和电源完整性等背景知识，综合要求比较高，是目前点到点（point-to-point）有线（wireline）通信的技术热点。

2023年4月14日 · Serdes是一种高速串行数据传输技术，用于将并行数据序列化和解序列化。 它在FPGA中用于高速通信、存储接口，如PCIExpress和DDR3/4。 Serdes结构包含时钟恢复、数据编解码、串行器和解串器等模块。 LVDS是Serdes常用的差分传输标准。

2019年5月31日 · FPGA的SerDes PLL一般有8x,16x,10x,20x,40x模式，以支持常用的SerDes接口协议。比如PCIExpress工作在5Gbps, 在40x模式下需要提供125MHz的片外参考时钟，20x模式下需要提供250MHz的片外参考时钟。

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2024年11月19日 · 传统的光互 连通信解决方案是将并行电信号通过芯片内部的串行器/反串行器 (SerDes)转换为高速串行电信号， 再通过芯片外部的光收发器转换为光信号。 由于 SerDes 电路的高功耗和链路比特率，光互连的发展 逐渐面临瓶颈。

A serializer/deserializer consists of functional blocks in a chip that are used to convert parallel data into serial data, allowing designers to speed up data communication without having to increase the number of pins.

2023年10月25日 · PCIe SerDes is specifically designed for PCIe interfaces providing high-speed connectivity between the various components within a computer system. These SerDes interfaces are used in desktops and servers to enable fast data exchange between the components like graphics cards, storage devices and motherboards.