SuperH (or SH) is a 32-bit reduced instruction set computing (RISC) instruction set architecture (ISA) developed by Hitachi and currently produced by Renesas. It is implemented by microcontrollers and microprocessors for embedded systems.

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SuperH 32-bit embedded RISC MCUs and MPUs offer high performance per unit of power (MIPS/W), a more compact size, and high cost performance.

Aug 5, 2019 · The SH-3 is a 32-bit RISC-style (load/store) processor with fixed-length 16-bit instructions. The small instruction size permits higher code density than its contemporaries, with Hitachi claiming a code size reduction of a third to a half …

Jun 10, 2015 · The architecture in question is Hitachi's SuperH, whose instruction set was a precursor to one used in many ARM Thumb CPUs. But the patents on the most important SuperH designs have all expired—and more will be expiring in the months and years to come—which makes SuperH a candidate for revival.

High performance per unit of power (MIPS/W), more compact size, and high cost performance: SuperH Family 32-bit embedded RISC MCUs & MPUs. CPU cores for a variety of applications and devices, including single-chip controllers, processors, and ASSPs.

The SH-1 is the first CPU core of the SuperH Family products. Featuring 56 basic instructions, the SH-1 contributed to the smaller sizes of digital still cameras, increased functionality of digital notebooks and PDAs, and to the higher capability and lower costs of industrial equipment.

The SuperH has an on-chip fixed point multiplication and accumulation unit for DSP function. This unit completes multiplication and accumulation in 2 to 3 clock cycles. Digital filtering, vector operations, discrete cosine transforms and high speed …

SuperH （スーパーエイチ）は、 日立製作所 （後の ルネサスエレクトロニクス）が開発した 組み込み機器 用 32ビット RISC マイクロコンピュータ 用アーキテクチャである。 1990年代後半以降に到来すると考えられた ユビキタスコンピューティング 社会における普及を目指し、立ち上げ当初から消費電力あたりの性能 (MIPS/W) の向上を標榜していたことが特徴の一つである …

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