Through Silicon Vias or TSVs are vertical wires used to precisely connect stacked chips. They are formed by etching trenches into silicon and then filling them with insulating liners and metal wires.

Through silicon via (TSV) is an important structure in the back end of line applications in current semiconductor indus-try. TSVs are typically used to interconnect function units of logic and memory chips to realize 3D integration. Appropriate TSV etching technique has the potential to become a critical approach to overcome the scaling limit by

2023年7月18日 · TSV etching has many requirements, including good control of through-hole dimensions (through-hole depth and width), sufficient selectivity for etch masks, minimal sidewall roughness, and high throughput.

2024年4月29日 · Through-silicon vias (TSVs) for 3D integration are superficially similar to damascene copper interconnects for integrated circuits. Both etch the via, into either silicon or a dielectric, line it with a barrier against copper diffusion, then deposit a seed layer prior to filling the via with copper using some form of aqueous deposition.

2020年4月14日 · Etching occurs using reactive ion species that bombard a surface. The impingement of ions on the surface can create damage in the form of unsatisfied bonds. The gas species used for etching can react with this surface to form volatile byproducts, thus removing the material from the substrate.

Abstract—Deep Reactive Ion Etch (DRIE) processes used to form Through Silicon Vias (TSVs) achieve high aspect ratios by depositing polymer on the vertical sidewalls of the features.

We propose a quantitative evaluation method for TSV etch profiles whereby we consider sidewall angle, curvature profile, undercut, and scallop. A weighted sum of the four evaluated parameters, nominally total score (TS), is suggested for the numerical evaluation of an individual TSV profile.

TSV Etch (ICP) A TSV is a vertical electrical connection passing completely through the silicon wafer. The formation of this structure requires a highly anisotropic etch process, with silicon to resist selectivity high enough to allow for trenches with a depth of greater than 500µm.

2023年5月1日 · This paper analyzes reduced gas flow effects in a HAR through-silicon via (TSV) etch process, with the aim of improving the sustainability of future processes through an improved mechanistic understanding.

Detailed TSV technology process flows, including critical steps related to 3D TSV products. Technology roadmap for new technology adoption. A stand-alone equipment & materials report focused exclusively on 3D TSV products. Update of our 2016-2022 equipment & materials market forecast for 3D TSV.