Implemented in a 65 nm CMOS RF technology, post-layout simulation shows that the proposed VCO can be tuned from 681 MHz to1656 MHz. VCO gain is around 170 MHz/V with 17% variation across the tuning range, while the step between two sub-bands is 99 MHz.

adf4360-9是一款集成电压控制振荡器(vco)的整数n分频频率合成器，中心频率由外部电感设置，vco频率范围为65 mhz至400 mhz。 附加的分频器级可以对VCO信号进行分频。

Implemented in a 65-nm CMOS process with a die area of 0.198 mm2 , the VCO exhibits a PN of −122.5 dBc/Hz at a 1-MHz offset from 8 GHz, corresponding to a peak figure of merit (FoM) of 192 dBc/Hz.

Abstract—This paper presents a differential voltage controlled oscillator (VCO) implemented in a 65nm bulk CMOS technology for the unlicensed 60GHz band. It achieves a record efficiency of 4.9% by generating a maximum differential output power of -0.9dBm while drawing 16.5mA from a 1V supply (including buffers).

Abstract: This work presents a design of a complementary cross-coupled LC-VCO with Switched Varactors Array (SVA) that has been designed on a 65 nm TSMC process for an application in L-Band communication systems. Consuming a total of 9.7 mA of current by applying a 1.8 V power supply, it achieves a single sideband phase noise of -112.7 dBc/Hz ...

2013年2月16日 · 本文介绍了一种超低功耗65 ghz lc-vco，专用于无线高数据速率应用。 它采用65 nm CMOS SOI工艺设计，可改善无源器件的性能。 拟议的VCO在载波10 MHz时实现9.7％的频率调谐范围（FTR）和-110.86 dBc / Hz的相位噪声。

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2019年6月13日 · The proposed VCO is simulated in 65nm TSMC CMOS technology in Cadence software and 1.2 V supply voltage. The wide tuning range of the proposed VCO varies from 4.25 to 21.31 GHz (80.07%), its power is 12.36 mW at 4.25 GHz frequency.

2014年10月1日 · A low-power, high-FoM (figure of merit), time-domain VCO (voltage controlled oscillator)-based ADC (analog-to-digital converter) in 65 nm CMOS technology is proposed. An asynchronous sigma-delta modulator (ASDM) is used to convert the voltage input signal to a square wave time signal, where the information is contained in its pulse-width.

Abstract: In this paper a novel ring oscillator based VCO using a programmable low-dropout regulator (LDO) for coarse frequency tuning, which offers wide tuning range, low phase noise and low die area for integer or fractional-N PLLs is proposed. This design is using two paths to cover more frequencies.