In microelectronics, a dual in-line package (DIP or DIL) [1] is an electronic component package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board (PCB) or inserted in a socket.

1、DIP（Dual In-line Package）：双排直插封装，DIP是特别指代2.54mm引脚间距 (中心距)的IC封装形式, 两侧引脚的距离一般为0.6/0.3英寸 (15.24mm/7.62mm), 简称宽体/窄体, 同时为了特殊场合更好区分, 也把 窄体称作 SDIP （SKDIP），Skinny Dual In-line Package (SDIP), 但这个简称应用的不多, 而且还容易和下面要说的更小的封装搞混.

35.7 40-Pin PDIP The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

two external pin connections. • Selectable oscillator options: - RC: Low-cost RC oscillator - XT: Standard crystal/resonator - HS: High-speed crystal/resonator - LP: Power-saving, low-frequency crystal • Packages: - 18-pin PDIP and SOIC for PIC16F54 - 20-pin SSOP for PIC16F54 - 28-pin PDIP, SOIC and SSOP for PIC16F57 - 40-pin PDIP for PIC16F59

28/40-Pin, Low-Power, High-Performance Microcontrollers Description PIC18F26/45/46Q10 microcontrollers feature Analog, Core Independent, and Communication Peripherals for a wide range of general purpose and low-power applications. These 28/40/44 -pin devices are

Pin 1 visual index feature may vary, but must be located within the hatched area. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. Dimensioning and tolerancing per ASME Y14.5M BSC: Basic Dimension. Theoretically exact value shown without tolerances.

PIC16F628A-I/P具有增强的内核功能，八级深度堆栈以及多个内部和外部中断源。 哈佛架构的独立指令和数据总线允许一个14位宽的指令字和单独的8位宽的数据。 两级指令流水线允许所有指令在一个周期内执行，除了程序分支（需要两个周期）。 共有35条指令（精简指令集）可用，并辅之以大型寄存器集。 典型值从休眠模式唤醒4?s，3.0V。 立创商城PIC16F628A-I/P型号页面提供型号详细中文资料，PDF数据手册在线查看和下载,中文参数，引脚图，代替型号和在线购买等 …

3.3 40-Pin PDIP. 3.4 48-Pin VQFN/TQFP. 4 I/O Multiplexing and Considerations. 4.1 Multiplexed Signals. 5 Conventions. 5.1 Numerical Notation. 5.2 Memory Size and Type. 5.3 Frequency and Time. 5.4 Registers and Bits. 5.5 ADC Parameter Definitions. 6 AVR® CPU. 6.1 Features. 6.2 Overview. 6.3 Architecture.

8-Lead Plastic Dual In-Line Package [PDIP] Narrow Body (N-8) Dimensions shown in inches and (millimeters) a 0.400 (10.16) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) BSC 0.365 (9.27) 0.355 (9.02) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.430 (10.92) MAX 0.060 (1.52) MAX 0.015 (0.38) 0.015 (0.38) MIN GAUGE PLANE SEATING PLANE 0. ...

3.3 40-Pin PDIP The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.