2024年6月11日 · This patch series add dt-bindings, driver and device tree support for DISPCC, CAMCC and GPUCC on QCOM SM4450 platform and also includes a fix related to LUCID EVO PLL config issue in clk-alpha-pll driver which is required for correct scaling of few supported frequencies in graphics clock controllers on SM4450.

4 天之前 · * [PATCH 1/3] dt-bindings: PCI: qcom: Move phy, wake & reset gpio's to root port 2025-03-22 3:00 [PATCH 0/3] PCI: qcom: Move PERST# GPIO & phy retrieval from controller to PCIe bridge node Krishna Chaitanya Chundru @ 2025-03-22 3:00 ` Krishna Chaitanya Chundru 2025-03-24 16:39 ` Rob Herring 2025-03-22 3:00 ` [PATCH 2/3] arm64: qcom: sc7280 ...

2025年1月13日 · [PATCH 0/7] phy: qcom: Introduce USB support for SM8750: Date: Mon, 13 Jan 2025 13:52:06 -0800 ... Add M31 eUSB2 PHY config Wesley Cheng (6): dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add SM8750 to QMP PHY dt-bindings: phy: Add the M31 based eUSB2 PHY bindings dt-bindings: usb: qcom,dwc3: Add SM8750 compatible phy: qcom: qmp-combo: Add ...

1 天前 · [PATCH v4 1/2] arm64: dts: qcom: qcs8300: add a PCIe port for WLAN: Date: Tue, 25 Mar 2025 15:53:30 +0800: Add an original PCIe port for WLAN. This port will be referenced and supplemented by specific WLAN devices. Signed-off-by: Stone Zhang <[email protected]>---

1 天前 · Hi Stephan, On 3/25/2025 2:24 AM, Stephan Gerhold wrote: > On Tue, Mar 18, 2025 at 05:51:32PM -0700, Wesley Cheng wrote: >> The QC ADSP is able to support USB playback endpoints, so that the main

5 天之前 · On Tue, Mar 18, 2025, Bjorn Andersson wrote: > In order to more tightly integrate the Qualcomm glue driver with the > dwc3 core the driver is redesigned to avoid splitting the implementation

QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p platform use non-SCMI resource. In the future, the SA8775p platform will move to use SCMI resources and it will have new sa8775p-related device tree. Consequently, introduce "qcom,qcs9100-pcie-ep" to the PCIe device match table.

2024年12月9日 · The address space in CDSP PAS (Peripheral Authentication Service) remoteproc node should point to the QDSP PUB address space (QDSP6...SS_PUB) which has a length of 0x10000.

2018年5月9日 · Add controller driver for QCOM SoCs that have hardware based shared resource management. The hardware IP known as RSC (Resource State Coordinator) houses multiple Direct Resource Voter (DRV) for different execution levels. A DRV is a unique voter on the state of a shared resource.

2017年3月9日 · This patch series adds couple of PHY drivers for Qualcomm chipsets. a) qcom-qusb2 phy driver: that provides High Speed USB functionality. b) qcom-qmp phy driver: that is a combo phy providing support for USB3, PCIe, UFS and few other controllers. The patches are based on next branch of linux-phy tree.