2023年4月10日 · EUV machine redundancy is probably something only TSMC can exploit, as even Samsung does not have enough EUV machines to withstand a pellicle break. Still a hassle to clean up though. Changing masks is also a time-consuming operation, as the mask z-position needs to be confirmed to not shift the patterns differently.

2020年8月10日 · TSMC has developed what the company claims is the world's first environmental-friendly "dry-clean technique for EUV mask" to replace the traditional clean process. Through fall-on analysis and contamination source elimination, the fall-on count of each 10,000 wafers decreased from hundreds of particles to single-digit particles, which achieved ...

2021年8月18日 · If Intel 4 used to be Intel 7nm and has been renamed to be comparable with TSMC processes, then geometrically speaking (pitch, density) it presumably falls in between TSMC N5 (15 EUV masks/layers) and TSMC N3 (25 EUV masks/layers).

2018年10月18日 · "Both Samsung and TSMC will apply EUV probably only to two chip layers at 7nm, so far not using protective pellicles that are still in development, said Handel Jones, president of International Business Strategies.

2016年12月9日 · Therefore, the current EUV tools would require double patterning for ~28 nm pitch and more patterning than that for ~20 nm pitch. It would obviously be more expensive than TSMC’s 7nm process today. Without EUV, immersion would require quadruple patterning down to 20 nm pitch. SAQP is the most commonly expected choice.

2024年4月30日 · than in Taiwan. If tsmc's N2/A16/A14 GM is ~40%, then intel could start from GM 10~0% if the D0 is comparable and use the same EUV tools as tsmc. It is quite challenging. Now intel bets on more expensive and not HVM ready HiNA EUV scanner. Intel needs not just deliver 14A on-time, but superfast yield ramp.

2024年9月10日 · Perhaps TSMC would like to push the development of the hyper NA-EUV machine with throughput of 400 wafers/hour, and totally skip the high-NA EUV version that Intel has ordered some 6-8 tools or so? At some point the newest low NA-EUV will become so modular and similar in dimensions like the proposed new hyper-NA tool.

2021年12月17日 · TSMC and Samsung both started mass production of technologies (N7+ and S7LPP) in 2019, but the demands for N5 in terms of # of EUV layers is higher than for S5, and TSMC now produces both N7+ and N6 nodes, concurrent to N5 at different factories, all of which consume many EUV layers and thus tools.

2020年11月16日 · Korean companies have made big progress in extreme ultraviolet (EUV) lithography technology. The number of EUV lithography-related patent applications filed with the Korean Intellectual Property Office (KIPO) peaked at 88 in 2014 and reached 55 in 2018 and 50 in 2019, according to a KIPO report on patent applications in the last 10 years (2011-2020).

2025年2月25日 · Back in April, 2019, TSMC announced that they were introducing their 5 nm technology in risk production and now at IEDM 2019 they brought forth a detailed description of the process which has passed 1000 hour HTOL and will be in high volume production in 1H 2020. This 5nm technology is a full node scaling…